AD converter and display unit

ABSTRACT

An AD converter includes: a reference voltage generator circuit having a plurality of resistors connected in series with predetermined reference voltage applied to both ends thereof, the reference voltage being divided at connecting points between the individual resistors to generate a plurality of reference voltages; a voltage comparator circuit configured to compare the plurality of reference voltages and analog input signals for conversion into predetermined comparison output signals; and a variable voltage circuit connected to the connecting points of the reference voltage generator circuit and provided with a control signal input terminal inputted with control signals, configured to set an output voltage to be outputted to the connecting points at a predetermined value based on the control signals.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority fromthe prior Japanese Patent Application No. 2005-327908 filed on Nov. 11,2005; the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an AD converter for converting analogsignals into digital signals of a predetermined number of bits and foroutputting the digital signals, and relates to a display unit.

2. Description of Related Art

In a display unit, such as a television, analog signals picked up by animage pickup device, such as a charge coupled device (hereinafterreferred to as CCD), are converted to digitized image signals by an ADconverter, and an image is displayed based on the digitized imagesignals. As an AD converter for digitizing analog image signals in adisplay unit, a parallel AD converter is generally used, which isconfigured to collectively compare reference voltages of differentvoltage values with analog input voltages.

In case of displaying an image whose contrast is low, such as an overalldark image, digital image signals after AD conversion are subjected toimage correction, such as contrast adjustment. Further, image analysis,such as histogram analysis, is carried out for the digital image signalsafter the AD conversion, and based on the results of the analysis, imagecorrection is controlled. In performing the contrast adjustment, aquantization width (voltage corresponding to 1 bit) for digital imagesignals falling in contrast-enhancing ranges is expanded, and aquantization width for digital image signals falling in other ranges isnarrowed according to the contents of control that has been determinedbased on the image analysis. Thus, in case an AD converter imparting allranges with an equal quantization width, or having linearcharacteristics, is used in digitizing image signals, a quantizationwidth for the image signals provided with the contrast adjustment andfalling within the contrast-enhancing ranges is expanded. As a result,qualities of an image displayed on the display unit are deteriorated. Inorder to avoid this, as disclosed in Japanese Patent Laid-Open No.2004-048327, an AD converter having nonlinear characteristics is used,which performs digitization of image signals in such a way as to makenarrower a quantization width for the image signals within thecontrast-enhancing regions than that of other ranges.

The AD converter described in Japanese Patent Laid-Open No. 2004-048327includes: a series of resistors in which a plurality of resistors areconnected in series with a predetermined reference voltage applied toboth ends thereof, the reference voltage being divided at connectingpoints between the individual resistors to produce a plurality ofreference signals; a plurality of comparators for comparing voltages ofthe plurality of reference signals with voltages of analog image signalsfor conversion into comparison output signals of either a logic “0” or alogic “1”; and an encoder for outputting digital image signals (digitalcodes) of a predetermined number of bits based on the comparison outputsignals which are outputted from the comparators. In the AD convertermentioned above, a resistance of each resistor in the series ofresistors is differentiated from the others to differentiate at eachresistor an amount of voltage, or a quantization width, for convertibleanalog image signals, so that nonlinear characteristics are realized.

In the AD converter described in Japanese Patent Laid-Open No.2004-048327, conversion characteristics are fixedly set in advancebecause the resistance of each resistor in the series of resistors isfixed. On the other hand, an expansion rate for the digital signals inthe contrast-enhancing ranges in performing contrast adjustment ischanged according to characteristics or the like of analog image signalsas inputted. Under such circumstances, a problem has been raised that amismatch occurs between a quantization width required for thecontrast-enhancing ranges at the time of performing contrast adjustment,and a quantization width at the time of performing actual digitalconversion.

BRIEF SUMMARY OF THE INVENTION

An AD converter according to one embodiment of the present inventionincludes: a reference voltage generator circuit having a plurality ofresistors connected in series with predetermined reference voltageapplied to both ends thereof, the reference voltage being divided atconnecting points between the individual resistors to generate aplurality of reference voltages; a voltage comparator circuit configuredto compare the plurality of reference voltages and analog input signalsfor conversion into predetermined comparison output signals; and avariable voltage circuit connected to the connecting points of thereference voltage generator circuit and provided with a control signalinput terminal inputted with control signals, configured to set anoutput voltage to be outputted to the connecting points at apredetermined value based on the control signals.

A display unit according to one embodiment of the present inventionincludes: an AD conversion part including a reference voltage generatorcircuit having a plurality of resistors connected in series withpredetermined reference voltage applied to both ends thereof, thereference voltage being divided at connecting points between theindividual resistors to generate a plurality of reference voltages, avoltage comparator circuit configured to compare the plurality ofreference voltages and analog image signals for conversion intopredetermined comparison output signals, and a variable voltage circuitconnected to the connecting points of the reference voltage generatorcircuit and provided with a control signal input terminal inputted withcontrol signals, configured to set an output voltage to be outputted tothe connecting points at a predetermined value based on the controlsignals; an image analysis part configured to analyze digital imagesignals outputted from the AD conversion part to output the voltagecontrol signals and image correction signals; and an image correctionpart configured to correct and process the digital image signals basedon the image correction signals.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic circuit diagram for explaining a configuration ofan AD converter 1 according to an embodiment of the present invention;

FIG. 2 is a conversion characteristics diagram of the AD converter 1where V_(V)=(V_(L)+V_(H))/2, according to an embodiment of the presentinvention;

FIG. 3 is a conversion characteristics diagram of the AD converter 1where V_(V)<(V_(L)+V_(H))/2, according to an embodiment of the presentinvention;

FIG. 4 is a block diagram for explaining one example of a configurationof a display unit using the AD converter 1 according to an embodiment ofthe present invention;

FIG. 5 is a conversion characteristics diagram showing analog imagesignals in relation to digital image signals after contrast processing,according to an embodiment of the present invention;

FIG. 6 is a schematic circuit diagram for explaining a configuration ofanother AD converter 11 according to an embodiment of the presentinvention;

FIG. 7 is a diagram showing one example of conversion characteristics ofthe AD converter 11 according to an embodiment of the present invention;

FIG. 8 is a conversion characteristics diagram showing analog imagesignals in relation to digital image signals after contrast processing,according to an embodiment of the present invention; and

FIG. 9 is a schematic circuit diagram for explaining a configuration ofstill another AD converter 21 according to an embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE EMBODIMENTS OF THE INVENTION

Hereinafter are described some embodiments of the present invention withreference to the accompanying drawings.

First of all, a configuration of an AD converter 1 according to anembodiment of the present invention is described with reference toFIG. 1. FIG. 1 is a schematic circuit diagram for explaining aconfiguration of the AD converter 1 according to an embodiment of thepresent invention. As shown in FIG. 1, the AD converter 1 of the presentembodiment includes a reference voltage generator circuit 2 forgenerating reference signals to be compared with inputted analog imagesignals “e”, a comparator circuit 3 for comparing the reference signalswith the analog image signals, and a logic circuit 4 for producingdigital image signals (digital codes) “x” based on the comparisonresults in the comparator circuit 3.

The reference voltage generator circuit 2 has an “n+1” number ofresistors R₁ to R_(n+1) in cascade connection with a reference voltageV_(H) applied to an open end of the higher potential resistor R_(n+1)and a reference voltage V_(L) applied to an open end of the lowerpotential resistor R₁. The resistors R₂ to R_(n) are each adapted toexhibit substantially an equal resistance, while the resistors R₁ andR_(n+1) are adapted to exhibit half a resistance of each of theresistors R₂ to R_(n). It should be appreciated that, due to variationor the like induced by the individual difference between the resistors,the resistances of the resistors R₂ to R_(n) may not be completelyequal. In addition, as the resistors R₁ to R_(n), an “n+1” number ofresistors having substantially an equal resistance to each other may beused.

An “n” number of reference voltage nodes N₁ to N_(n) are formed atconnecting points between the individual resistors R₁ to R_(n+1).Further, the open end of the resistor R₁ on the lower potential side andthe reference voltage node Ni (“i” represents a preset number between“1” to “n”) are connected to each other through a variable voltagegenerator 5. A voltage V_(V) of the variable voltage generator 5, or avariable voltage circuit, is controlled to be a desired value by acontrol signal inputted from outside through a voltage control signalinput terminal 6.

Thus, the reference voltage nodes N₁ to N_(i) output reference voltagesVref₁ to Vref_(i) obtained by dividing the reference voltages V_(L) toV_(H) between the resistors R₁ to R_(i), and the reference voltage nodesN_(i+1) to N_(n) output reference voltages Vref_(i+1) to Vref_(n)obtained by dividing the reference voltages V_(V) to V_(H) between theresistors R_(i+1) to R_(n+1).

For example, where the variable voltage generator 5 is connected to thereference voltage node N_((n/2)) and a relation V_(V)=(V_(L)+V_(H))/2 isestablished, potential intervals between the reference voltages Vref₁ toVref_(n) become equal to each other. Where a relationV_(V)<(V_(L)+V_(H))/2 is established, potential intervals between thereference voltages Vref₁ to Vref_(i) are equal to each other and thosebetween the reference voltages Vref_(i+1) to Vref_(n) are equal to eachother. However, a potential difference (which is a “quantization width”)between juxtaposed reference nodes in the reference voltage nodes N₁ toN_(i) becomes smaller than a potential difference between juxtaposedreference nodes in the reference voltage nodes N_(i+1) to N_(n) (seeFIGS. 2 and 3). FIG. 2 is a conversion characteristics diagram of the ADconverter 1 where V_(V)=(V_(L)+V_(H))/2 and FIG. 3 is a conversioncharacteristics diagram of the AD converter 1 whereV_(V)<(V_(L)+V_(H))/2. Each of FIGS. 2 and 3 shows conversioncharacteristics, with the horizontal axis indicating analog imagesignals “e” inputted to the AD converter 1, and the vertical axisindicating the digital image signals (digital codes) “x” which areoutputted after being digitized by the AD converter 1. In this way,application of the voltage V_(V) to the reference voltage node N_(i) bythe variable voltage generator 5 can differentiate potential differencesof the reference voltage between juxtaposed nodes, the reference voltagenode N_(i) being a border, thereby enabling the conversioncharacteristics of the AD converter 1 to be adjusted by control of thevoltage V_(V).

The comparator circuit 3 is made up of an “n” number of comparators C₁to C_(n) each serving as a voltage comparator circuit. The referencevoltages Vref₁ to Vref_(n) outputted from the reference voltage nodes N₁to N_(n), respectively, are inputted to inversion input terminals (+terminals) of the comparators C₁ to C_(n), respectively, while an inputvoltage Vin of analog image signals is inputted to each of non-inversioninput terminals (− terminals). In the individual comparators C₁ toC_(n), the respective reference voltages Vref₁ to Vref_(n) and theanalog input voltages Vin are collectively compared. As a result, whenthe analog input voltage Vin is higher than each of the voltages Vref₁to Vref_(n), a higher voltage “H” is outputted to the logic circuit 4,and when lower, a lower voltage “L” is outputted to the logic circuit 4.In the logic circuit 4, the digital codes are produced based on theoutputs from the comparator circuit 3 for output as the digital imagesignals “x”.

A display unit using the AD converter 1 according to the presentembodiment is described below with reference to FIG. 4. FIG. 4 is ablock diagram for explaining one example of a configuration of thedisplay unit using the AD converter 1. As shown in FIG. 4, the ADconverter 1 is electrically connected to an image analysis unit 11 andan image correction unit 12. In the AD converter 1, analog image signalsinputted from a CCD, not shown, for example, are converted to digitalimage signals for output to the image analysis unit 11 and the imagecorrection unit 12.

In the image analysis unit 11, various analyses, including histogramanalysis, are carried out for the digital image signals “x” inputtedfrom the AD converter 1 to determine contents of image correction, suchas contrast adjustment, based on the results of the analyses. Further,the image analysis unit 11 outputs control signals for image correctionto the image correction unit 12 based on the contents of the determinedimage correction. The image analysis unit 11 also outputs controlsignals associated with the voltage V_(V) of the variable voltagegenerator 5 to the AD converter 1 based on the contents of thedetermined image correction. In the AD converter 1, the voltage V_(V) ofthe variable voltage generator 5 is set based on the control signalsinputted from the image analysis unit 11.

For example, in case the analog image signals “e” converged tolow-voltage regions, i.e. image signals of dark and low contrast, areinputted to the image analysis unit 11 through the AD converter 1, theimage analysis unit 11 determines image correction, so that aquantization width for the low-voltage region image signals is expandedat an expansion rate of “a” to enhance contrast, and a quantizationwidth for image signals of other regions is narrowed at an expansionrate of “b” to reduce contrast. The image analysis unit 11 outputs theexpansion rate “a” for the contrast-enhancing regions and the expansionrate “b” for the contrast-reducing regions to the image correction unit12 as control signals for image correction. At the same time, the imageanalysis unit 11 outputs control signals to the AD converter 1indicating that the quantization width for the contrast-enhancingregions is narrowed at an expansion rate of “a′” and the quantizationwidth of the contrast reducing regions is expanded at an expansion rateof “b′”.

In the AD converter 1, the voltage V_(V) of the variable voltagegenerator 5 is set based on the control signals inputted from the imageanalysis unit 11. In this case, in order to narrow the quantizationwidth for the low-voltage regions for enhancing contrast and to expandthe quantization width for other regions for reducing contrast, thevoltage V_(V) is set to be smaller than (V_(L)+V_(H))/2. In this way,the image analysis unit 11 immediately analyzes the digital imagesignals inputted from the AD converter 1, so that the control signalsfor changing the voltage V_(V) of the variable voltage generator 5 aresequentially fed back to the AD converter 1. Therefore, the AD converter1 can dynamically change the conversion characteristics so that digitalimage signals suitable for attaining a good-quality image can beobtained.

In the image correction unit 12, image correcting process, such ascontrast correction, is carried out for the digital image signalsinputted from the AD converter 1, in accordance with the control signalsfor image correction inputted from the image analysis unit 11. In thisregard, the digital image signals being imparted with the imagecorrection processing and outputted from the image correction unit 12are controlled in the expansion rates “a”, “a′”, “b” and “b′” as shownin FIG. 5, so that the quantization width for the contrast-enhancedregions and that for the contrast-reduced regions become substantiallyequal to each other to display a good-quality image. FIG. 5 is aconversion characteristics diagram showing the analog image signals inrelation to the digital image signals after contrast processing. Itshould be noted that conversion characteristics diagram shown in FIG. 5is of the case where the digital image signals having conversioncharacteristics of FIG. 2 where V_(V)<(V_(L)+V_(H))/2 and outputted fromthe AD converter 1, have been subjected to contrast processing. Thedigital image signals being imparted with the image correctionprocessing are outputted from the image correction unit 12 and displayedon a monitor or the like through various downstream processes, notshown, if required.

As described above, in the AD converter 1 according to the presentembodiment, by connecting the variable voltage generator 5 to thereference voltage node N_(i) and by changing the voltage V_(V) based onthe control signals provided from outside, the potential differencebetween the juxtaposed nodes that are present between the referencevoltage nodes N₁ and N_(i) can be differentiated from the potentialdifference between the juxtaposed nodes that are present between thereference voltage nodes N_(i+1) and N_(n), the reference voltage nodeN_(i) being a border, thereby realizing the non-linear characteristicsand dynamically changing the conversion characteristics.

In the embodiments described above, the variable voltage generator 5 hasbeen connected to only one reference voltage node N_(i) to apply apredetermined voltage thereto for realization of the conversioncharacteristics having one curving point. However, in order to realizeconversion characteristics having a plurality of curving points, aplurality of variable voltage generators may be connected to a pluralityof respective reference nodes to apply predetermined voltages thereto.

For example, in case of realizing conversion characteristics havingthree curving points, an AD converter 11 may be so configured that, asshown in FIG. 6, three variable voltage generators 5 a, 5 b and 5 c,each of which is connected to an open end of a lower potential resistorR₁ at one end thereof, are connected to three different reference nodesN_(i1), N_(i2) and N_(i3), respectively, at the other end of each of thethree variable voltage generators 5 a, 5 b and 5 c, and predeterminedvoltages (V_(V1), V_(V2) and V_(V3), whereV_(l)<V_(V1)<V_(V2)<V_(V3)<V_(H)) are applied to the variable voltagegenerators 5 a, 5 b and 5 c. FIG. 6 is a schematic circuit diagram forexplaining the configuration of the AD converter 11 according to anembodiment of the present invention.

As shown in FIG. 7, by adjusting the voltages V_(V1), V_(V2) and V_(V3)to desired values under the control of signals from outside, such asfrom the image analysis unit 11, inputted through voltage control signalinput terminals 6 a, 6 b and 6 c, quantization widths for the referencenodes N₁ to N_(i1) and the reference nodes N_(i3) to N_(n) can beexpanded, and a quantization width for the reference nodes N_(i2) toN_(i3) can be narrowed. FIG. 7 shows one example of conversioncharacteristics of the AD converter 11. FIG. 7 shows the conversioncharacteristics with the horizontal axis indicating analog image signals“e” inputted to the AD converter 11, and the vertical axis indicatingdigital image signals (digital codes) “x” outputted from the ADconverter 11 being digitized.

For the digital image signals that have been subjected to AD conversionto have the characteristics as shown in FIG. 7, a contrast correctionprocess is performed in the image correction unit 12, so that thequantization widths for the regions corresponding to the reference nodesN₁ to N_(i1) and the reference nodes N_(i3) to N_(n) are narrowed toreduce contrast, and quantization width for the region corresponding tothe reference nodes N_(i2) to N_(i3) is expanded to enhance contrast. Asa result, as shown in FIG. 8, in all the regions, i.e. in thecontrast-enhanced region, the contrast-unchanged region and thecontrast-reduced region, the quantization widths can be madesubstantially equal to each other to ensure displaying of a good-qualityimage. FIG. 8 is a conversion characteristics diagram showing a relationbetween the analog image signals and the digital image signals after thecontrast processing.

Alternatively, as shown in FIG. 9, conversion characteristics havingthree curving points can be achieved by configuring an AD converter 21by using three variable voltage generators 5 a′, 5 b′ and 5 c′ incascade connection, with one end of the variable voltage generator 5 a′(one end of the cascade variable voltage generators) connected to anopen end of the lower potential resistor R₁, a connecting point betweenthe variable voltage generators 5 a′ and 5 b′ connected to the referencenode N_(i1), a connecting point between the variable voltage generator 5b′ and 5 c′ connected to the reference node N_(i2), and one end of thevariable voltage generator 5 c′ (the other end of the cascade variablevoltage generators) connected to the reference node N_(i3). FIG. 9 is aschematic circuit diagram for explaining a configuration of another ADconverter 21 according to an embodiment of the present invention.

Each of the above embodiments have been described taking as an example aparallel AD converter having the nonlinear characteristics with one orthree curving points. However, the present invention is not limited tothe embodiments described above, but various modifications, alterationsor the like can be made within a scope not departing from the spirit ofthe present invention. For example, the curving points in the conversioncharacteristics may be four or more. Alternatively, another type of ADconverter, such as a subrange type, instead of the parallel type may beconfigured, so that reference voltages inputted to comparators can becontrolled from outside using a variable voltage generator.

As described above, according to the present embodiment, an AD converterand a display unit, which enables dynamic change of conversioncharacteristics, can be realized.

Having described the embodiments of the invention referring to theaccompanying drawings, it should be understood that the presentinvention is not limited to those precise embodiments and variouschanges and modifications thereof could be made by one skilled in theart without departing from the spirit or scope of the invention asdefined in the appended claims.

1. An AD converter comprising: a reference voltage generator circuithaving a plurality of resistors connected in series with a predeterminedreference voltage applied to both ends thereof, said reference voltagebeing divided at connecting points between respective ones of saidplurality of resistors to generate a plurality of reference voltages; avoltage comparator circuit configured to compare said plurality ofreference voltages and analog input signals for conversion intopredetermined comparison output signals; and a variable voltage circuitconnected to a connecting point of said reference voltage generatorcircuit and provided with a control signal input terminal inputted withcontrol signals, configured to set an output voltage to be outputted tosaid connecting point at a first predetermined value based on saidcontrol signals, wherein said output voltage of said variable voltagecircuit is varied, so that a ratio of a potential difference betweensaid connecting point connected with said variable voltage circuit andsaid connecting point juxtaposed, on a higher potential side, to saidconnecting point, to a potential difference between said connectingpoint connected with said variable voltage circuit and said connectingpoint juxtaposed, on a lower potential side, to said connecting point,is varied to a second predetermined value.
 2. The AD converter accordingto claim 1, wherein said variable voltage circuit is provided with aplurality of variable voltage generators, said plurality of variablevoltage generators being each connected to a different one of saidconnecting points.
 3. The AD converter according to claim 2, whereinsaid output voltage of each of said plurality of variable voltagegenerators is varied, so that a ratio of a potential difference betweensaid connecting point connected with each of said plurality of variablevoltage generators and said connecting point juxtaposed, on the higherpotential side, to said connecting point, to the potential differencebetween said connecting point connected with said variable voltagegenerator and said connecting point juxtaposed, on the lower potentialside, to said connecting point, is varied to the second predeterminedvalue.
 4. The AD converter according to claim 2, wherein said pluralityof variable voltage generators are in cascade connection.
 5. The ADconverter according to claim 4, wherein said output voltage of each ofsaid plurality of variable voltage generators is varied, so that a ratioof a potential difference between said connecting point connected witheach of said plurality of variable voltage generators and saidconnecting point juxtaposed, on the higher potential side, to saidconnecting point, to the potential difference between said connectingpoint connected with said variable voltage generator and said connectingpoint juxtaposed, on the lower potential side, to said connecting point,is varied to the second predetermined value.
 6. A display unitcomprising: an AD conversion part including a reference voltagegenerator circuit having a plurality of resistors connected in serieswith a predetermined reference voltage applied to both ends thereof,said reference voltage being divided at connecting points between saidrespective ones of said plurality of resistors to generate a pluralityof reference voltages, a voltage comparator circuit configured tocompare said plurality of reference voltages and analog image signalsfor conversion into predetermined comparison output signals and avariable voltage circuit connected to a connecting point of saidreference voltage generator circuit and provided with a control signalinput terminal inputted with control signals, configured to set anoutput voltage to be outputted to said connecting point at a firstpredetermined value based on said control signals; an image analysispart configured to analyze digital image signals outputted from said ADconversion part to output said control signals and image correctionsignals; and an image correction part configured to correct and processsaid digital image signals based on said image correction signals. 7.The display unit according to claim 6, wherein said output voltage ofsaid variable voltage circuit is varied, so that a ratio of a potentialdifference between said connecting point connected with said variablevoltage generator and said connecting point juxtaposed, on a higherpotential side, to said connecting point, to a potential differencebetween said connecting point connected with said variable voltagegenerator and said connecting point juxtaposed, on a lower potentialside, to said connecting point, is varied to a second predeterminedvalue.
 8. The display unit according to claim 7, wherein said imageanalysis part outputs an expansion rate of a quantization width of saidanalog image signals on said higher potential side and an expansion rateof a quantization width of said analog image signals on said lowerpotential side, in the form of said image correction signals.
 9. Thedisplay unit according to claim 8, wherein said image analysis partoutputs, on said higher potential side and said lower potential side,said control signals for narrowing the quantization width for a regionon a contrast-enhancing side and for expanding the quantization widthfor a region on a contrast-reducing side.
 10. The display unit accordingto claim 9, wherein said image correction part performs correction sothat the quantization width in the region on said higher potential sideand the quantization width in the region on said lower potential sideare made equal to each other.
 11. The display unit according to claim 6,wherein said variable voltage circuit is provided with a plurality ofvariable voltage generators, said plurality of variable voltagegenerators being each connected to a different one of said connectingpoints.
 12. The display unit according to claim 11, wherein said outputvoltage of each of said plurality of variable voltage generators isvaried, so that a ratio of a potential difference between saidconnecting point connected with each of said plurality of variablevoltage generators and said connecting point juxtaposed, on a higherpotential side, to said connecting point, to a potential differencebetween said connecting point connected with said variable voltagegenerator and said connecting point juxtaposed, on a lower potentialside, to said connecting point, is varied to the second predeterminedvalue.
 13. The display unit according to claim 11, wherein saidplurality of variable voltage generators are in cascade connection. 14.The display unit according to claim 13, wherein said output voltage ofeach of said plurality of variable voltage generators is varied, so thata ratio of a potential difference between said connecting pointconnected with each of said plurality of variable voltage generators andsaid connecting point juxtaposed, on a higher potential side, to saidconnecting point, to a potential difference between said connectingpoint connected with said variable voltage generator and said connectingpoint juxtaposed, on a lower potential side, to said connecting point,is varied to a second predetermined value.
 15. The display unitaccording to claim 12, wherein said image analysis part outputs anexpansion rate of a quantization width of said analog image signals onsaid higher potential side and an expansion rate of a quantization widthof said analog image signals on said lower potential side, in the formof said image correction signals.
 16. The display unit according toclaim 15, wherein said image analysis part outputs, on said higherpotential side and said lower potential side, said control signals fornarrowing the quantization width for a region on a contrast-enhancingside and for expanding the quantization width for a region on acontrast-reducing side.
 17. The display unit according to claim 16,wherein said image correction part performs correction so that thequantization width in the region on said higher potential side and thequantization width in the region on said lower potential side are madeequal to each other.
 18. The display unit according to claim 13, whereinsaid image analysis part outputs an expansion rate of a quantizationwidth of said analog image signals on said higher potential side and anexpansion rate of a quantization width of said analog image signals onsaid lower potential side, in the form of said image correction signals.19. The display unit according to claim 1, wherein said image analysispart outputs, on said higher potential side and said lower potentialside, said control signals for narrowing the quantization width for aregion on a contrast-enhancing side and for expanding the quantizationwidth for a region on a contrast-reducing side.